HDL-Bits Solution: Conditional

In this quiz, we are asked to design a combinational circuit that finds the minimum value among four unsigned 8-bit inputs: a, b, c, and d.

Unsigned numbers can be compared directly using relational operators such as <. The goal is to determine which input has the smallest value and assign that value to the output min.

In my implementation, I used an always @(*) block to describe a combinational circuit. Inside the block, I applied a series of if-else conditions to compare all four inputs.

First, the code checks whether a is smaller than b, c, and d. If this condition is true, then a is the minimum value, so it is assigned to min.
If not, the code continues to check b, c, and d in the same way.

Each condition ensures that the selected value is smaller than all the others. If none of the conditions are satisfied (for example, when two or more inputs have the same minimum value), the else case assigns 0 to the output.

Although the problem suggests building the solution using smaller two-input minimum circuits and combining them, this implementation directly compares all four inputs in a straightforward way. This approach is simple and works correctly, but it does not strictly follow the suggested modular design using conditional operators.

 

Here is my code for this quiz and it pass the evaluation.

module top_module (
input [7:0] a, b, c, d,
output [7:0] min);//

always@(*)
begin
if ((a<b)&&(a<c)&&(a<d))
min = a;
else if ((b<a)&&(b<c)&&(b<d))
min = b;
else if ((c<a)&&(c<b)&&(c<d))
min = c;
else if ((d<a)&&(d<b)&&(d<c))
min = d;
else
min = 8’b00000000;
end

endmodule

Reference: https://hdlbits.01xz.net/wiki/Conditional

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